A highly advanced management of electronics, CMOS, and optical physics is pushing system-in-package designs past the terabit-per-second boundary in this DARPA-sponsored project. There’s a constant reassessment among the three key system blocks—processor, memory, and interconnects (I/O)—which is presently the “choke point” in enhancing overall performance, with each element pushing to get better so as to not encounter undue blame.
As processors and memories improve as measured by various metrics, interconnects need to keep up, too, but copper-based links are pushing up against some distinct barriers. An optical physics approach – electro-optical interconnects seem like the answer, but getting them to reach their potential as well as work with silicon has been a major challenge.
Recently a demonstration under the program showed some dramatic progress. The goals of this program aren’t modest nor humble, as they look to use advanced in-package silicon photonic interfaces to achieve data rates greater than 100 terabits per second (Tb/s) while requiring energy of less than 1 picojoule (pJ)/bit, as well as be capable of kilometer-scale distances.